Xilinx Design Summary

sdrm Project Status (06/10/2014 - 23:54:14)
Project File: | sdram_ver_134.xise | Parser Errors: | No Errors
Module Name: | sdrm | Implementation State: | Programming File Generated

Target Device:

xc4vsx25-12ff668

- Errors:

No Errors

Product Version:

ISE 14.7

- Warnings:

57 Warnings (57 new)

Design Goal:

Balanced

- Routing Results:

All Signals Completely Routed

Design Strategy:

Xilinx Default (unlocked)

- Timing Constraints:

All Constraints Met

Environment:

System Settings

- Final Timing Score:

0 (Timing Report)

Device Utilization Summary | [-]
Logic Utilization | Used | Available | Utilization | Note(s)
Number of Slice Flip Flops | 293 | 20,480 | 1% |
Number of 4 input LUTs | 168 | 20,480 | 1% |
Number of occupied Slices | 230 | 10,240 | 2% |
Number of Slices containing only related logic | 230 | 230 | 100% |
Number of Slices containing unrelated logic | 0 | 230 | 0% |
Total Number of 4 input LUTs | 173 | 20,480 | 1% |
Number used as logic | 134 |  |  |
Number used as a route-thru | 5 |  |  |
Number used as Shift registers | 34 |  |  |
Number of bonded IOBs | 92 | 320 | 28% |
Number of BUFG/BUFGCTRLs | 2 | 32 | 6% |
Number used as BUFGs | 2 |  |  |
Number of DCM_ADVs | 2 | 4 | 50% |
Average Fanout of Non-Clock Nets | 2.48 |  |  |

Performance Summary | [-]
Final Timing Score: | 0 (Setup: 0, Hold: 0, Component Switching Limit: 0) | Pinout Data: | Pinout Report
Routing Results: | All Signals Completely Routed | Clock Data: | Clock Report
Timing Constraints: | All Constraints Met |  |

Detailed Reports | [-]
Report Name | Status | Generated | Errors | Warnings | Infos
Synthesis Report | Current | 周一 六月 2 10:20:56 2014 | 0 | 57 Warnings (57 new) | 8 Infos (8 new)
Translation Report | Current | 周一 六月 2 10:22:17 2014 | 0 | 0 | 4 Infos (0 new)
Map Report | Current | 周一 六月 2 10:22:33 2014 | 0 | 0 | 2 Infos (2 new)
Place and Route Report | Current | 周一 六月 2 10:22:58 2014 | 0 | 0 | 1 Info (1 new)
Power Report |  |  |  |  |
Post-PAR Static Timing Report | Current | 周一 六月 2 10:23:13 2014 | 0 | 0 | 4 Infos (4 new)
Bitgen Report | Current | 周二 六月 10 23:53:58 2014 | 0 | 0 | 1 Info (1 new)

Secondary Reports | [-]
Report Name | Status | Generated
WebTalk Report | Current | 周二 六月 10 23:54:01 2014
WebTalk Log File | Current | 周二 六月 10 23:54:14 2014

Date Generated: 06/10/2014 -